A typical solid-state electronic image sensor comprises a number of light-sensitive picture elements (“pixels”) arranged in a two-dimensional array. These pixels are generally formed in a semiconductor material and have the property of accumulating electric charges resulting from electron-hole pairs created by the photons entering the pixels. In a charge-coupled device (CCD) image sensor, the accumulated charges may be read out of the image sensor by shifting the charge out of the array. Alternatively, in an active pixel sensor (APS), the charge may be converted to a voltage by circuitry located within the array in proximity to the pixel and the resulting voltages may be sampled and read in a scanning fashion. APS image sensors are also known as Complementary Metal Oxide Semiconductor (CMOS) image sensors.
In accordance with conventional practice, sampling and readout of the pixel signals in a CMOS image sensor generally involves sampling all the pixel signals in a given row into column circuits, and then reading out the entire row of sampled pixel signals in a sequential fashion from the column circuits. This sampling and readout operation proceeds row by row until the entire pixel array is read out. In conventional practice, the sampling and readout operations do not overlap in time, and the sampling operation represents a significant fraction of the total time required to read the pixel signals from the array.
U.S. Patent Application Publication No. 2009/0195681, entitled “Sampling and Readout of an Image Sensor Having a Sparse Color Filter Array Pattern,” which is incorporated by reference herein, discloses sampling and readout for a CMOS image sensor where sampling of pixel signals occurs concurrently with readout of previously sampled pixels. In this scheme, two column circuits are provided for each column signal output from the pixel array. A pixel signal from a selected pixel is sampled by one of the column circuits at the same time that a previously sampled pixel signal in the other column circuit is being read out. By overlapping the sampling and readout operations in this way, the amount of time used for the sampling operation is eliminated. This reduces the total time required to read the pixel signals from the array and increases the frame readout rate of the image sensor.
The sampling operation may sample system noise in addition to pixel signals. Since the sampling operation described above occurs simultaneously for an entire row of pixel signals, there is the potential for captured system noise to be correlated for an entire row or a portion of a row of sampled pixel signals. In an imaging system as described above, this row correlated noise produces an objectionable visual artifact in the captured image. In conventional non-overlapping sampling and readout of a CMOS image sensor, the system noise may be reduced by shutting off noise generators during the sampling time, notably clock signals to portions of the readout circuitry. However, in the overlapping sampling and readout operation outlined above, turning off the clock signals to the readout circuitry during sampling is not an option as the readout operation takes place concurrently with the sampling operation. Consequently, although the concurrent sampling and readout technique provides an improvement in readout time, it also increases susceptibility to sampling system noise and incurring objectionable row-correlated visual artifacts.